The present invention relates generally to an internal power supply auxiliary circuit which supplies a current to an internal power generator in a semiconductor integrated circuit device, and, more particularly, to prevention of an increase in current consumption of an internal power supply auxiliary circuit.
High integration of semiconductor integrated circuit devices and the miniaturization of internal elements have reduced the withstand voltage of transistors. In this respect, semiconductor integrated circuit devices have an internal power generator which receives an external supply voltage and produces an internal supply voltage. When a sense amplifier in a semiconductor integrated-circuit device which includes a DRAM, for example, starts operating, the current capacity of the internal power supply decreases. Therefore, semiconductor integrated circuit devices are equipped with an internal power supply auxiliary circuit which receives power from an external power supply and supplies a current to the internal power generator.
FIG. 1 is a circuit diagram of a conventional internal power supply auxiliary circuit 20. The internal power supply auxiliary circuit 20, which is a pulse-switched type regulator, comprises a pulse signal generator 21, a driver-driving circuit 22 and a current supply driver 23.
The pulse signal generator 21 includes NAND gates 24a to 24c and inverters 25a to 25f. The pulse signal generator 21 receives an input signal in having a low level and outputs a control signal Ps having a low level, and receives a high-level input signal in and outputs a high-level control signal Ps during the operation delay time of the NAND gates 24a-24c and the inverters 25a-25f. 
The driver-driving circuit 22 includes a CMOS inverter which is comprised of PMOS and NMOS transistors TP1 and TN1. The CMOS inverter receives the control signal Ps and sends a drive pulse signal Pgate to the current supply driver 23.
The current supply driver 23 has a PMOS transistor TP2, which has a source for receiving an external supply voltage Vcc, a gate for receiving the drive pulse signal Pgate and a drain connected to the current supply terminal of an internal power generator 19.
When a sense amplifier circuit of, for example, a DRAM initiates its operation, an excessive current is supplied to a load from the internal power generator 19. At this time, the high-level input signal in is supplied to the internal power supply auxiliary circuit 20, and the pulse signal generator 21 outputs the high-level control signal Ps for a predetermined period of time. In response to the high-level control signal Ps, the driver-driving circuit 22 outputs the drive pulse signal Pgate of a low (ground GND) level. In response to the low-level drive pulse signal Pgate, the PMOS transistor TP2 of the current supply driver 23 is turned on to supply a supply current Is to the internal power generator 19.
The PMOS transistor TP2 has a size large enough to supply the sufficient supply current Is to the internal power generator 19 even when the external supply voltage Vcc is low. When a high external supply voltage Vcc is supplied to the PMOS transistor TP2, the excessive supply current Is is output from the PMOS transistor TP2 as shown in FIG. 2, increasing current consumption.
Accordingly, it is an object of the present invention to provide a semiconductor integrated circuit device equipped with an internal power supply auxiliary circuit which prevents current consumption from increasing.
Briefly stated, the present invention provides a semiconductor integrated circuit device including: an output transistor; a driving circuit for outputting a drive signal which drives the output transistor in response to a control signal, the output transistor outputting a current based on a first supply voltage in response to the drive signal; and a level regulator, connected to the driving circuit, for regulating a voltage of the drive signal in accordance with a change in the first supply voltage.
The present invention provides a reference voltage generator for receiving a supply voltage and outputting a reference voltage from a reference voltage output terminal. The reference voltage generator includes: a first differential amplifier for receiving a substantially constant voltage and outputting from a first output terminal an output voltage substantially equal to the constant voltage; a first voltage-dividing circuit for dividing the supply voltage to produce a first divided voltage; a second voltage-dividing circuit, connected between the reference voltage output terminal and the first output terminal, for dividing a potential difference between the reference voltage and the output voltage to produce a second divided voltage; and a second differential amplifier for receiving the first and second divided voltages from the first and second voltage-dividing circuits and supplying the reference voltage to the reference voltage output terminal by operating so that the second divided voltage becomes substantially equal to the first divided voltage.
The present invention provides a power supply auxiliary circuit for supplying a current to a power generator circuit. The auxiliary circuit includes: a pulse signal generator which receives an input signal and generates a first control signal therefrom; a driver-driving circuit connected to the pulse signal generator for receiving the first control signal therefrom, an external supply voltage, and a source voltage and generates a drive pulse signal therefrom; a current supply driver circuit connected to the driver-driving circuit which receives the drive pulse signal and the external supply voltage and outputs a supply current to the power generator circuit; a reference voltage generator for producing a reference voltage; and a gate voltage regulator circuit connected to the driver driving circuit and the reference voltage generator, the gate voltage regulator circuit receiving the reference voltage and producing the source voltage, wherein the gate voltage regulator causes the source voltage to substantially match the reference voltage.
The present invention provides a semiconductor memory device including: a transistor, disposed between an external power supply line and an internal power supply line, having a gate electrode; a driving circuit, operatively connected to the gate electrode and disposed between a first node and a second node, for controlling the transistor in response to a pulse signal; and a level controlling circuit receiving an external power supply voltage and operatively connected to one of the first and second nodes, for controlling a potential at one of the first and second nodes in response to a potential of the external power supply voltage.